Speaker: Gurulingesh Raravi Date: Friday, Nov. 13, 2009 Time: 12:00 Location: Building E, Board of Directors meeting room (Sala Reunioes), ISEP.
Talk Abstract: Automakers are trying to make vehicles more intelligent and safe by embedding processors which can be used to implement “by-wire” applications for taking smart decisions on the road or assisting the driver in doing the same. Given this proliferation, there is a need to efficiently utilize and minimize the computational processing requirements without affecting the performance and safety of the applications. The latter is especially important since these by-wire applications are distributed and real-time in nature and involve deadline bound computations on critical data gathered from the environment. These applications have stringent requirements on the freshness of data items and completion time of the tasks. Our work studied one such safety-related automotive application namely, Automatic Merge Control (AMC) which ensures safe vehicle maneuver in the region where two or more roads intersect.
This talk is based on our RTSS´08 paper (and further extensions to it - tentative) and will focus on: - the proposed algorithms for AMC - how DSRC-based wireless communication protocol can be leveraged for the development of AMC - a real-time approach towards designing AMC by integrating mode-change and real-time repository concepts for reducing the processing computational requirements - simulation and experimental (on robotic platforms) results
Reference: Vipul Shingde, Gurulingesh Raravi, Ashish Gudhe, Prakhar Goyal, Krithi Ramamritham, "Merge-By-Wire: Algorithms and System Support", RTSS’2008.
Speaker Bio.: Gurulingesh Raravi received his Masters in 2005 from IIT Bombay where his final year project was on "Efficient Real-Time Support for Automotive Applications: A Case Study". He has three years of work experience (which includes one year of Research Assistantship at IIT Bombay). His research activity at CISTER is in the area of Real-Time Scheduling for Heterogenous Multicore Systems.
Instituto Superior de Engenharia do Porto